As logic integrated circuits (IC) have migrated to lower working voltages in the search for higher operating frequencies, and as overall system sizes have continued to decrease, power supply designs with smaller and higher efficiency power modules are in demand. In an effort to improve efficiencies and increase power densities, synchronous rectification has become necessary for these type of applications. Synchronous rectification has gained great popularity in the last ten years as low voltage semiconductor devices have advanced to make this a viable technology.
Synchronous rectification refers to using active devices such as the MOSFET as a replacement for diodes as rectifier elements in circuits. Recently, self-driven synchronous schemes have been widely adopted in the industry as the desired method for driving the synchronous rectifiers in DC/DC modules for output voltages of 5 volts and below.
Most of these self-driven schemes are designed to be used with a very particular set of topologies commonly known as "D, 1-D" (complementary driven) type topologies. See Cobos, J. A., et al., "Several alternatives for low output voltage on board converters", IEEE APEC 98 Proceedings, at pp. 163-169. See also U.S. Pat. No. 5,590,032 issued on Dec. 31, 1996 to Bowman et al. for a Self-synchronized Drive Circuit for a Synchronous Rectifier in a Clamped-Mode Power Converter, and U.S. Pat. No. 5,274,543 issued on Dec. 28, 1993 to Loftus entitled Zero-voltage Switching Power Converter with Lossless Synchronous Rectifier Gate Drive. In these types of converters, the power transformer signal in the secondary winding has the correct shape and timing to directly drive the synchronous rectifiers with minimum modifications.
In topologies such as the hard-switched half-bridge (HB) and the full-bridge (FB) rectifiers, and the push-pull topologies and non "D, 1-D" type topologies (e.g. clamp forward with passive reset), the transformer voltage has a recognizable zero voltage interval, making it undesirable to implement self-driven synchronous rectification. As a result, it is necessary to use an external drive circuit with these circuit topologies. Using the transformer voltage to drive the synchronous rectifiers results in conduction of the parasitic anti-parallel diode of the MOSFETs used for the synchronous rectifiers for a significant portion of the freewheeling interval, negatively affecting the efficiency of the module, which is undesired. Some self-driven implementations for the resonant reset forward have been reported. See Murakami, N. et al., "A highly efficient, low-profile 300 W power pack for telecommunications systems", IEEE APEC 1994 Proceedings, at pp. 786-792 and Yamashita, N. et al., "A compact, highly efficient 50 W on board power supply module for telecommunications systems", IEEE APEC 1995 Proceedings, at pp. 297-302. In these implementations, the resonant reset interval has been adjusted to provide the correct gate-drive signal during the freewheeling interval. Therefore, the externally-driven implementation offers a better solution for synchronous rectification in many instances. However, the prior art externally-driven synchronous rectification is both complex and costly.
The implementation of an externally driven scheme for non "D, 1-D" type topologies, for example, requires a timing network that will allow the proper adjustment for the synchronous rectifier driving pulses relative to the primary drive, a signal transformer or opto-coupler to transfer the timing information between primary and secondary, an inverting stage, and a driving stage. The inverting stage is required to generate the proper driving pulses for the synchronous rectifier that handles the freewheeling current. The complexity and cost of such an external driving scheme has deterred the electronics industry from embracing the externally driven synchronous rectifier. Thus, what is needed is a simplified implementation of the externally driven synchronous rectifier.